1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device, more specifically to a nonvolatile semiconductor memory device configured as an arrangement of memory cells that are provided with a variable resistor and are operative to store data by changing the resistance of the variable resistor.
2. Description of the Related Art
In recent years, along with a rising level of integration in semiconductor devices, circuit patterns of transistors and the like which configure the semiconductor devices are being increasingly miniaturized. Required in this miniaturization of the patterns is not simply a thinning of line width but also an improvement in dimensional accuracy and positional accuracy of the patterns. This trend applies also to semiconductor memory devices.
Conventionally known and marketed semiconductor memory devices such as DRAM, SRAM, and flash memory each use a MOSFET as a memory cell. Consequently, there is required, accompanying the miniaturization of patterns, an improvement in dimensional accuracy at a rate exceeding a rate of the miniaturization. As a result, a large burden is placed also on the lithography technology for forming these patterns which is a factor of rise in product cost.
In recent years, resistance varying memory is attracting attention as a candidate to succeed these kinds of semiconductor memory devices utilizing a MOSFET as a memory cell (refer, for example, to Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2005-522045). Such a resistance varying memory can employ a cross-point type cell structure in which a memory cell is formed at a cross point of a bit line and a word line that intersect with each other. This structure can be more easily miniaturized than a conventional memory cell structure and can also be configured as a vertically stacked structure. Therefore, this structure is advantageous in that it is easy to improve the level of integration of the memory cell array.
Write of data (setting operation) to a so-called unipolar-type resistance varying memory (in which a memory cell includes a unidirectional rectifying element) is implemented by applying a certain voltage for a short time to a variable resistor. As a result, the variable resistor changes from a high-resistance state to a low-resistance state. In contrast, erase of data (resetting operation) is implemented by applying for a long time to the variable resistor in the low-resistance state subsequent to the setting operation a certain voltage which is set lower than in the setting operation. As a result, the variable resistor changes from the low-resistance state to the high-resistance state.
In implementing such setting and resetting operations, it is important to appropriately control a cell current that flows through the variable resistor, not only from a perspective of reducing power consumption but also from a perspective of ensuring stable setting and resetting operations. If the cell current is excessively large, a short-circuiting current path (short path) might be formed in the variable resistor, which might spoil the memory cell function. Hence, it is desired that the control system be configured to be able to avoid such a situation as much as possible.